A new article, “Full Throttle: OpenMP 4.0” by Michael Klemm, Senior Application Engineer, Intel and Christian Terboven, Deputy Head of HPC Group, RWTH Aachen University, appears in the current issue of Intel’s Parallel Universe magazine.
“Multicore is here to stay.” This single sentence accurately describes the situation of application developers and the hardware evolution they are facing. Since the introduction of the first dual-core CPUs, the number of cores has kept increasing. The advent of the Intel® Xeon Phi™ coprocessor has pushed us into the world of manycore— where up to 61 cores with 4 threads each impose new requirements on the parallelism of applications to exploit the capabilities of the hardware.
It is not only the ever-increasing number of cores that requires more parallelism in an application. Over the past years, the width of SIMD (Single Instruction Multiple Data) registers has been growing. While the early single instruction multiple data (SIMD) instructions of Intel® MMX™ technology used 64-bit registers, our newest family member, Intel® Advanced Vector Instructions 512 (Intel® AVX-512), runs with 512-bit registers. That’s an awesome 16 floating-point numbers in single precision, or eight double-precision numbers that can be computed in one go. If your application does not exploit these SIMD capabilities, you can easily lose a factor of 16x or 8x compared to the peak performance of the CPU.
To read the entire article, download the magazine in PDF. The article starts on page 6.
Intel’s Tim Mattson’s Introduction to OpenMP video tutorial is now available.
Thanks go to the University Program Office at Intel for making this tutorial available.
Michael Wolfe, at PGI, writes about programming standards for the next generation of HPC systems.
Having just returned from SC13, one burning issue is the choice of a standard approach for programming the next generation HPC systems. While not guaranteed, these systems are likely to be large clusters of nodes with multicore CPUs and some sort of attached accelerators. A standard programming approach is necessary to convince developers, and particularly ISVs, to start adoption now in preparation for this coming generation of systems. John Barr raised the same question in a recent article at Scientific Computing World from a more philosophical point of view. Here I address this question from a deeper technical perspective.
Read the complete article at »HPCWire.
Videos of the five in-booth talks and the Birds of a Feather session at Supercomputing 2013 (November 2013, Denver CO) are now »online.
The first release of the OpenMP 4.0 API Examples document is now available and can be downloaded from the Specifications page. This is a work in progress — additional examples are under development and will be released in later editions.
Also, a discussion forum for the 4.0 Examples document is now open.
Join the OpenMP ARB at Supercomputing ’13 and learn about the OpenMP 4.0 API. Come to the OpenMP Booth #4117 for your OpenMP 3.1 or 4.0 reference cards, and stay for presentations, prize drawings, and hot pretzels and kegs of cold microbrew in the afternoons.
The Clang/LLVM compiler now supports OpenMP 3.1
Linux Journal / Advanced OpenMP
In Online Journal Embedded
A portable OpenMP runtime library based on MCA APIs for embedded systems – Part 3
ACM Digital Library
Portable mapping of OpenMP to Multicore embedded systems using MCA APIs